Fudzilla told you about it in April
Fudzilla has reported back in April abou AMD's t Exascale Heterogeneous Processor (EHP) with 16 cores and a Greenland APU and now it seems that the rest of the world has caught up.
A paper was submitted at IEEE and it was the first time AMD mentioned sixteen Zen cores wrapped around the GPU and powered by HBM 2 memory. We believe that this is a 16-core processor with 32 thread support and not 32 core as many reported. We will know soon enough and then can have another "we told you so headline."
We would not be surprised if we hear more about this AMD processor at the Hot Chips conference on August 23 rd . The EHP computing solution uses a silicon interposer and an APU chip that packs a GPU and CPU. All this will be surrounded by die-stacked DRAM.
The Italian website that brought this news back to life claims that AMD expects to ship this products between 2016 and 2017. That is the sort of timing when you can expect with the rest of the ZEN based cores on the market. One can only hope that it will happen sooner rather than later. AMD needs to get more of the high performance compute market and earn some profits.
The IEEE article gives a bit light on AMD exascale computer strategy.
This article provides an overview for AMD's vision for exascale computing, and in particular how heterogeneity will play a central role in realizing this vision. Exascale computing requires very high levels of performance capabilities while staying within very stringent power budgets. Hardware optimized for specific functions is much more energy efficient than implementing those functions with general purpose cores. However, there is a strong desire for supercomputer customers to not have to pay for custom components designed only for high-end HPC systems, and therefore high-volume GPU technology becomes a natural choice for energy-efficient data-parallel computing. To make fully realize the capabilities of the GPU, we envision exascale compute nodes comprised of integrated CPUs and GPUs (i.e., accelerated processing units or APUs) along with the hardware and software support to enable scientists to effectively run their scientific experiments on an exascale system. We discuss the hardware and software challenges in building a heterogeneous exascale system, and we describe on-going research efforts at AMD to realize our exascale vision.
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